1. Field of the Invention
The present invention relates to a semiconductor device and a fabrication method of the same, specifically, to a Metal Oxide Semiconductor (MOS) device having a gate insulation layer formed on a silicon substrate and a gate electrode formed on the gate insulation layer, and a fabrication method of such an MOS device.
2. Description of the Related Art
A Metal Oxide Semiconductor (MOS) device having a gate insulation layer formed on a silicon substrate and a gate electrode formed on the gate insulation layer has been widely used as a semiconductor device.
In a technology field of semiconductor devices, further miniaturization for high integration, high speed performance, low voltage operation, and the like have been demanded. In order to address such demands, further reduction of a gate insulation layer thickness is under vigorous investigation. Because gate leakage current due to a tunneling effect is increased when a conventional gate insulation layer made of silicon oxide is thinned, a so-called high-k (high dielectric constant) film such as HfO2 (hafnium oxide) film may be used instead of silicon oxide.
When such a high-k insulation layer is employed along with a poly-silicon gate electrode, silicide may be formed between the insulation layer and the gate electrode. In order to avoid silicide formation, use of a stacked layer gate insulator including a silicon oxide film, a high-k film such as HfO2 film formed on the silicon oxide film, and a metal nitride film formed on the high-k film has been proposed in an MOS device employing a poly-silicon gate electrode (See Japanese Patent Application Laid-Open Publication No. 2005-64317).
However, it is difficult to control a threshold voltage because of Fermi Level Pinning in the above MOS device, especially, a p-type MOS Field Effect Transistor (FET) device employing the poly-silicon gate electrode. In addition, when a metal gate electrode is used, it becomes difficult to control a threshold voltage because of flat-band voltage rolloff.
The present invention has been made in view of the above, and is directed to a semiconductor device where a threshold voltage can be controlled in an appropriate range and a flat-band voltage rolloff is suppressed, and a fabrication method of the same.